Name: Cyfronet - Intel oneAPI workshop
Start: 2023-10-24T09:30:00+02:00
End: 2023-10-26T17:00:00+02:00
Location: Nawojki 11, Krakow

Cyfronet - Intel oneAPI workshop

from Tuesday, 24 October 2023 (09:30) to Thursday, 26 October 2023 (17:00)

Monday, 23 October 2023
Tuesday, 24 October 2023

09:30 Welcome
Welcome
09:30 - 09:40
Room: room 303

09:40 Introduction to oneAPI and the new Intel Developer Cloud (IDC) infrastructure
Introduction to oneAPI and the new Intel Developer Cloud (IDC) infrastructure
09:40 - 10:30
Room: room 303 Hardware Evolution: From CPUs to heterogenous HW (GPUs, FPGAs) programming Concept and purpose for the oneAPI Standardization initiative Intel’s oneAPI Solutions – Toolkits with Compilers, libs, analysis, and migration tools Transition from Intel Parallel Studio XE to Intel oneAPI toolkits IDC: service platform for developing with the latest Intel HW & SW

10:30 Coffee break
Coffee break
10:30 - 10:50
Room: room 303

10:50 Direct programming with oneAPI DPC++/SYCL
Direct programming with oneAPI DPC++/SYCL
10:50 - 12:30
Room: room 303 Intro to heterogenous programming model with SYCL 2020 SYCL features and examples: • “Hello World” Example: buffer, accessor, queue, basic and nd-range kernels • Device Selection to offload kernel workloads • Execution Model • Compilation and Execution Flow • Memory Model; Buffers, Unified Shared Memory (USM) • Performance optimizations with SYCL features

12:30 Lunch break (lunch not provided)
Lunch break (lunch not provided)
12:30 - 13:30
Room: room 303

13:30 Hands-on labs on CPU/GPU programming with SYCL
Hands-on labs on CPU/GPU programming with SYCL
13:30 - 15:00
Room: room 303 Start Working with IDC, explore SYCL Understand the SYCL* language and programming model Use device selection to offload kernel workloads Decide when to use basic parallel kernels and ND Range Kernels Create a host accessor Build your first SYCL application

15:00 Coffee break
Coffee break
15:00 - 15:15
Room: room 303

15:15 Hands-on labs on CPU/GPU programming with SYCL (cont.)
Hands-on labs on CPU/GPU programming with SYCL (cont.)
15:15 - 17:00
Room: room 303 Continue your learning journey and use CPU/GPU
Wednesday, 25 October 2023

09:30 Welcome
Welcome
09:30 - 09:40
Room: room 303

09:40 Intel oneAPI Librairies oneDPL, oneTBB, oneMKL
Intel oneAPI Librairies oneDPL, oneTBB, oneMKL
09:40 - 10:30
Room: room 303 Intel oneAPI libraries (oneMKL) for HPC - with demos Performance optimized libraries for numerical simulations and other purposes

10:30 Coffee break
Coffee break
10:30 - 10:50
Room: room 303

10:50 Compatibility Tool (CUDA / SYCL conversion)
Compatibility Tool (CUDA / SYCL conversion)
10:50 - 11:20
Room: room 303 Open-Source Compatibility tool for porting purposes (SYCLomatic) with demo Migration Cuda based GPU Applications to SYCL

11:20 Hands-on labs on CUDA to SYCL Compatibility Tool
Hands-on labs on CUDA to SYCL Compatibility Tool
11:20 - 12:30
Room: room 303 Get your hands dirty with examples: • vecAdd • Rodinia NW

12:30 Lunch break (lunch not provided)
Lunch break (lunch not provided)
12:30 - 13:30
Room: room 303

13:30 Profiling and analysing code performance with VTune
Profiling and analysing code performance with VTune
13:30 - 14:30
Room: room 303 VTune main functionality (Hot spot analysis…) starting with CPU Profiling Tools Interfaces for GPU Profile heterogenous SYCL/OpenMP Workloads with Intel VTune

14:30 Application profiling for CPU and mixed hardware with Intel Advisor
Application profiling for CPU and mixed hardware with Intel Advisor
14:30 - 15:30
Room: room 303 Advisor main functionality (Vectorization and Roofline) starting with CPU Estimate performance potential gains with Offload Advisor (CPU -> HW Accelerator) Analyse heterogenous SYCL/OpenMP Workloads with Intel Advisor and Roofline analysis

15:30 Coffee break
Coffee break
15:30 - 15:45
Room: room 303

15:45 Hands-on labs on VTune / Advisor
Hands-on labs on VTune / Advisor
15:45 - 17:00
Room: room 303 Understand the basics of command line options in VTune Profiler to collect data and generate reports Profile a SYCL* application using Intel® VTune™ Profiler on Intel® DevCloud Run Offload Advisor using command line syntax Use performance models and analyze generated reports See how Offload Advisor¹ identifies and ranks parallelization opportunities for offload
Thursday, 26 October 2023

09:30 Welcome
Welcome
09:30 - 09:40
Room: room 303

09:40 Offloading C++ code to GPU with OpenMP
Offloading C++ code to GPU with OpenMP
09:40 - 10:30
Room: room 303

10:30 Coffee break
Coffee break
10:30 - 10:45
Room: room 303

10:45 Transitioning from Ifort to IFX
Transitioning from Ifort to IFX
10:45 - 11:10
Room: room 303 Intel Fortran Compiler provides full Fortran language standards support up through Fortran 2018 and expands OpenMP GPU offload support, speeding development of standards-compliant applications

11:10 Offloading with FORTRAN Code – with Demos
Offloading with FORTRAN Code – with Demos
11:10 - 12:00
Room: room 303 Automatic offloading using DO CONCURRENT Offloading using OpenMP 5.2 Offloading using oneMKL

12:00 Intel® MPI in Heterogenious Environment
Intel® MPI in Heterogenious Environment
12:00 - 12:30
Room: room 303 Intel MPI functionalities for GPU

12:30 Lunch break (lunch not provided)
Lunch break (lunch not provided)
12:30 - 13:30
Room: room 303

13:30 Hands-on labs on code optimisation
Hands-on labs on code optimisation
13:30 - 15:00
Room: room 303 Use OpenMP Offload directives to execute code on GPU Use OpenMP constructs to effectively manage data transfers to and from the device

15:00 Coffee break
Coffee break
15:00 - 15:15
Room: room 303

15:15 Hands-on labs on code optimisation (cont.)
Hands-on labs on code optimisation (cont.)
15:15 - 17:00
Room: room 303 To be defined – could be user-provided codes for an initial run